Title : Simulations of graphene layers used for the field effect transistors graphene based
Abstract:
Field Effect Transistors with Graphene (G-FETs) seem to be a serious candidate, as alternative to the traditional MOSFET transistors, benefiting from small dimensions, sometimes devices created on a single atomic layer, but accompanied by higher currents than in silicon, as the literature reported. Therefore, the G-FETs simulation represents a strong tool to develop this device area. The most reputable device simulation software is Silvaco. However, in the libraries of this software does not exist graphene, as a semiconductor material. However, graphene is a 2-dimensional sheet of carbon atoms, arranged in hexagonal shape, a configuration similar to the diamond. Therefore, the first G-FET transistor simulated in this work will use diamond with user-defined intrinsic properties. A G-FET transistor was simulated, starting from the manufacturing process in Athena. A layer of SiO2 about 80 nm thick is grown on a Si wafer, over which a diamond film about 180 nm thick is deposited. A thin layer of Al2O3 of 5 nm is deposited on top, as a gate insulator, and the polysilicon acts on top as a gate electrode, as in the MOSFET case. Laterally, the Source and Drain Al contacts are deposited, in the final G-FET structure. The structure is then loaded into Atlas to verify its functionality. Several simulated transfer characteristics, ID-VG, for pure diamond (Eg=5eV) and for various other band-gap Eg widths or impurities or electrodes material, on the diamond semiconductor were simulated. The simulations are compared and matched to some measurements of experimental transistors from literature. Finally, this paper presented an algorithm how simulations tools from standard industry can be adapted to offer simulations match with experimental curves, for transistors made by non-standard materials, like single-layer graphene (SLG), or nanocrystalline graphite (NCG).
